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  2. GIEE_SoC_V

[公告] Reference Program Update (Another bug fixed)

作者: chengyin (EYingerE)   2012-03-27 15:19:48
Another bug related to Verilog concatenation was fixed.
(Also discovered by Chia-Hsun.)
Please download latest reference program if needed.
繼續閱讀
[問題] Or gate 是logic Or 還是 bit-wise Or?kenylinRe: [問題] write designchengyinReference Program Update (A bug fixed)chengyin[問題] write designckmarkoh[問題] 新release的binarykenylin[問題] assertion failGJI4BP4Updated Binaries (Statically Linked)chengyin[問題]有關reference program kenylinProgrammer Guides to QuteRTL TodaychengyinRe: [情報] Test pattern 的 formatchengyin

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