(a) For a system with 64-bit logical address space, a two-level paging scheme
is appropriate.
=>False
(d) The TLB is associative, high-speed memory in which each entry consists of
a key and a value.
=>True
a選項,為什麼two-level page table不適合用在64bit system?
(64bit 代表page table size可能很大,不能用multilevel page table解決嗎?)
d選項,TLB不是也需要valid bit嗎 這樣這個選項怎麼會對?
thanks