[公告]國內外名師雲集的高等積體電路課程

作者: PIEPIE   2007-09-15 14:12:49
※ [本文轉錄自 NTUEE107 看板]
作者: PIEPIE () 看板: NTUEE107
標題: [公告]國內外名師雲集的高等積體電路課程
時間: Sat Sep 15 14:09:08 2007
各位電機系的同學,這學期大家有福了,
本學期電資學院電子所極為榮幸邀請到兩位國際知名IEEE Fellow教授到
台大客座研究:一位是University of Wisconsin - Madison胡玉衡教授
一位是University of Illinois at Urbana-Champaign 的Prof. Naresh Shanbhag。
Bio of Prof. Hu: http://www.engr.wisc.edu/ece/faculty/hu_yu.html
Bio of Prof. Shanbhag: http://icims.csl.uiuc.edu/~shanbhag/myhome/
兩位教授在先進的VLSI技術方面都有卓越前瞻的研究,故擬新增”高等積體電路”
,除了授課教師介紹各式先進的VLSI技術之外,更可把握難得的機會,於課程中安
排兩位客座教授的Invite talk(共十週),藉以讓本校師生能夠了解高等積體電路設
計方面的前瞻性研究趨勢。
另外,目前得知密西根大學(University of Michigan, Ann Arbor)的Prof.Igor Markov
也會給予一次的invite talk。
除了上述三名知名的國外教授給予授課之外,闕志達教授、吳安宇教授、
簡韶教逸教授和、盧奕璋教授將就VLSI在各領域的先進技術做探討。
若是對此門課程有興趣的同學,請加選此門課程,別在猶豫了,這是千載難逢的好機會。
以下將對Prof. Shanbhag的六週課程作講解,(其餘老師的課程細目尚未確定)。
Prof. Shanbhag 將會花六週的時間進行一系列課程,上課將採用國外大學的模式
,兩小時的課程和一小時的小組討論,Prof. Shanbhag相當喜歡在課程中跟學生討論,
他非常期待跟台灣一流的學生做交流,也希望能有些好的想法能留在台灣,因此,
希望各位同學能踴躍參與。
這六週將講解在未來VLSI的世界裡會遇到什麼瓶頸,並且該怎麼從circuit、architecture
和algorithm去解決
以下是這六週的課程綱要:
General Description:
This graduate-level lecture series will focus on issues in the design and
implementation of robust digital integrated circuits and systems. The series
will begin with an overview of nanometer non-idealities that have emerged in
recent years and the relationship between energy-efficiency/power and
reliability. This will be followed by discussion of noise-tolerant circuit
design techniques. A communications-inspired view of reliable and
energy-efficient SOC design will be the focus of the remainder of this lecture
series. Appropriate background material basics of communication techniques
and adaptive/statistical signal processing techniques will be provided.
A reading list will be provided. Students will be expected to make
presentations during part of the lecture and engage in discussions. Three
small (mini)-projects will be provided for students to obtain hands-on
experience with the material taught in class.
1. Non-idealities in nanometer process technologies
2. Noise-tolerant digital integrated circuit design
3. Communications-inspired IC Design I: Low-power bus coding
4. Communications-inspired IC Design II: Algorithmic Noise-Tolerance (ANT)
5. Communications-inspired IC Design III: Predictor-based ANT
6. Communications-inspired IC Design III: Algorithmic Soft-error Tolerance
作者: PIEPIE   2006-09-15 14:11:00
本門課為星期四的678節

Links booklink

Contact Us: admin [ a t ] ucptt.com