長期工讀, 6個月以上, 視專案調整
職務類別： 數位IC設計工程師
工作待遇： 依公司規定
工作性質： 長期工讀 限在學生
上班地點： 新竹市埔頂路25號
上班時段： w1-w5 0900-1800 皆可排班，每週需滿20小時，亦可上滿40小
可上班日： 兩週內
需求人數： 1至5 人
Join the world-class team to develop next generation high speed SME
networking chip. The candidate will have hands-on experience to work with
senior designers on all aspects of IC-design. In addition, the candidate will
have an opportunity to expose to the latest state-of-art design technology
and methodology. The candidate will also involve in
‧Design/Verification flow for networking SoC
‧Work with team members to execute design verification plan
‧Get familiar with tool chain for digital IC design flow
‧Help to trouble-shooting and root-cause design issue
Requirements:
‧Undergraduate (senior year) or 1st/2nd year of graduate study in Electrical
Engineering or Computer Science.
‧Familiar with UNIX/LINUX platform and logic design are required
‧Familiar with any of the following will be a plus.
A)Networking background
B)Verilog and System Verilog knowledge
C)SHELL/PERL scripting
D)C/C++ programming
工作經歷： 不拘
學歷要求： 碩士班以上 限在學生
科系要求： 電機電子工程相關、資訊管理相關、資訊工程相關
語文條件： 英文